Robust Recognition of Noisy Speech and its Hardware Design for Real Time Processing

In this paper, we propose a novel technique focusing on robust speech recognition and introduce a hardware based new speech recognition system. The realization of the proposed method is quite difficult in case of software processing since high computational cost is required for noise robust. In order to overcome the shortage, we adopt the scalable architecture focused on the word HMM structure. The proposed architecture can flexibly improve recognition performance and extend word vocabularies. In addition, the computation time is considerably decreasing. In the last part, this paper presents the verification platform for the proposed system to test various tasks on recognition systems. The developed FPGA platform enables real-time recognition experiments under various conditions.